Improving Path Sensitizability of Combinational Circuits
نویسندگان
چکیده
منابع مشابه
Analyzing and improving delay defect tolerance in pipelined combinational circuits
In this paper, we consider the problems of identiication of delay-fault-sensitive components in a pipelined combinational circuit, and of circuit modiication to improve the circuit's tolerance of delay faults. The results assume purely combinational logic, and xed gate delays calculated under oating delay mode.
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ژورنال
عنوان ژورنال: VLSI Design
سال: 1996
ISSN: 1065-514X,1563-5171
DOI: 10.1155/1996/61747